00673nam a2200229 a 4500 157736 OSt 20211230161354.0 200625 ### ENG 9789353062019 621.392 M31D Mano, M. Morris Digital design : with an introductionto the verilog HDL, VHDL and systemverilog by M. Morris Mano and Micheal D. Ciletti 6th ed. Utter Pradesh; India Pearson India Education Services Pvt Ltd. 2020 765p. verilog HDL VHDL systemverilog Ciletti, Michael D. ddc BK 20062 20062 0 0 0 0 TXB CURAJ CURAJ 2020-06-25 ECE 4 621.392 M31D 33810 2025-02-26 2025-02-13 2020-09-02 BK 0 0 ddc 0 1 1 RTB CURAJ CURAJ 2020-06-25 ECE 621.392 M31D 33809 2022-05-05 2020-09-02 BK 0 0 0 0 TXB CURAJ CURAJ 2020-06-25 ECE 621.392 M31D 33808 2020-09-02 2020-09-02 BK 0 0 0 0 TXB CURAJ CURAJ 2020-06-25 ECE 7 621.392 M31D 33807 2023-08-25 2023-08-11 2020-09-02 BK 0 0 0 0 TXB CURAJ CURAJ 2020-06-25 ECE 8 621.392 M31D 33806 2024-05-28 2024-04-29 2020-09-02 BK 0 0 0 0 TXB CURAJ CURAJ 2020-06-25 ECE 2 621.392 M31D 33805 2025-02-03 2025-01-16 2020-09-02 BK